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Datasheet File OCR Text:

TDA7407
Advanced car signal processor
Features

Fully integrated signal processor optimized for car radio applications Fully programmable by i2c bus Includes audioprocessor, stereo decoder with noise blanker and multipath detector Softmute function Programmable roll-off compensation No external components The device includes a three band audioprocessor with configurable inputs, and absence of external components for filter settings, a last generation stereo decoder with multipath detector, and a sophisticated stereo blend and noise cancellation circuitry. Strength points of the CSP approach are flexibility and overall cost/room saving in the application, combined with high performances. LQFP44
Description
The TDA7407 is the newcomer of the CSP family introduced by TDA7460/61. It uses the same innovative concepts and design technologies allowing fully software programmability through I2C bus and overall cost optimisation for the system designer.
Order codes
Part number TDA7407 TDA7407TR Package LQFP44 LQFP44 Packing Tray Tape and reel
January 2007
Rev 3
1/46
www.st.com 1
Contents
TDA7407
Contents
1 Block diagram and pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1 ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2
Audio processor part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 List of features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.1 2.1.2 2.1.3 2.1.4 2.1.5 2.1.6 2.1.7 Input multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Volume control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Bass control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Mid control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Treble control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Speaker control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Mute functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3
Stereo decoder part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1 Notes to the characteristics: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 5
Noise blanker part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1 Description of the audioprocessor part . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 5.1.7 5.1.8 5.1.9 5.1.10 5.1.11 5.1.12 5.1.13 Input multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 AutoZero . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 AutoZero remain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Multiplexer output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Softmute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 BASS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Attenuation (80Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Center frequency (60, 70, 80, 100Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Quality factors (1, 1.25, 1.5, 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 DC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 MID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Attenuation (1kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/46
TDA7407 5.1.14 5.1.15 5.1.16 5.1.17 5.1.18 5.1.19 5.1.20
Contents Center frequency (500, 1k, 1.5k, 2k Hz) . . . . . . . . . . . . . . . . . . . . . . . . 23 Quality factor (2 at 1kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Attenuation (17.5kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Center frequency (10, 12.5, 15, 17.5kHz) . . . . . . . . . . . . . . . . . . . . . . . 23 AC coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Speaker Attenuator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2
Functional description of the stereo decoder . . . . . . . . . . . . . . . . . . . . . . 26
5.2.1 5.2.2 5.2.3 5.2.4 5.2.5 5.2.6 5.2.7 5.2.8 5.2.9 5.2.10 5.2.11 5.2.12 Stereo decoder Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Ingain + Infilter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 De-emphasis and Highcut. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PLL and pilot tone detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Field strength control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 LEVEL Input and Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Stereoblend control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Highcut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Functional description of the noiseblanker . . . . . . . . . . . . . . . . . . . . . . . 29 Trigger path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Automatic noise controlled threshold adjustment (ATC) . . . . . . . . . . . . 30
5.3
Automatic threshold control mechanism . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.3.1 5.3.2 Automatic threshold control by the stereoblend voltage . . . . . . . . . . . . 31 Over deviation detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.4
Functional description of the multipath detector . . . . . . . . . . . . . . . . . . . . 31
5.4.1 5.4.2 5.4.3 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Quality detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 AF Search Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.5
Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6
I2C Bus interface description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.1 6.2 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
7 8
Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3/46
Contents
TDA7407
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4/46
TDA7407
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Audio processor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Stereo decoder electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Noise blanker electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Multipath electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Quality detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Transmitted data (send mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Subaddress (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Input selector (subaddress 0H). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Volume and speaker attenuation (subaddress 1H, 4H, 5H, 6H, 7H) . . . . . . . . . . . . . . . . . 36 Treble filter (subaddress 2H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Bass filter (subaddress 3H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Soft mute and bass programming (subaddress 8H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Stereo decoder (subaddress 9H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Noiseblanker (subaddress AH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 High Cut (subaddress BH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Field strength Control (subaddress CH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Configuration (subaddress DH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Stereo decoder adjustment (subaddress EH). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Testing (subaddress FH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 New quality / control (subaddress 10H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Mid filter (subaddress 11H). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
5/46
List of figures
TDA7407
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Vn timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trigger threshold vs.VPEAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Deviation controlled trigger adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Fieldstrength controlled trigger adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Softmute timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Bass control @ fc = 80Hz, Q = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Bass center @ Gain = 14dB, Q =1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Bass quality factors @ Gain =14dB, fc = 80Hz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Bass normal and DC mode @ Gain = 14dB, fc = 80Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Mid control @ fc=1kHz, Q=1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Mid center frequency @ Gain=14dB, Q1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Mid Q factor @ fc=1kHz, Gain=14dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Treble control @ fc = 17.5KHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Treble center frequencies @ Gain = 14dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Block diagram of the stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Signals during stereo decoder's softmute. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Internal Stereoblend characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Relation between internal and external LEVEL voltage and setup of stereoblend . . . . . . . 28 High cut characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Block Diagram of the Noiseblanker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Block diagram of the multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Mute control logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6/46
TDA7407
Block diagram and pin connections
1
Block diagram and pin connections
Figure 1. Block diagram
Figure 2.
Pin connections (top view)
ACOUTR
34 33 32 31 30 29 28 27 26 25 24 23 12 13 14 15 16 17 18 19 20 21 22
ACINRF
TAPE R
TAPE L
CREF
VREF
44
43
42
41
40
39
38
37
36
CDR CDROUT CDGND CDLOUT CDL N.C. PHONEPHONE+ AFS AM N.C.
ACOUTL
35
ACINRR
ACINLR
ACINLF
N.C.
1 2 3 4 5 6 7 8 9 10 11
N.C. OUT LF OUT RF OUT LR OUT RR N.C. VS GND N.C. SDA SCL
MPX
N.C.
LEVEL
MPIN
MPOUT
N.C.
MUXL
MUXR
N.C.
QUAL
SMUTE
PINCON-TDA7407
7/46
Block diagram and pin connections Table 1.
N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
TDA7407
Pin Description
Name CDR CD right channel input Function Type I O I O I Differential phone input Differential phone input + AFS drive AM input I I I I FM stereo decoder input I Level input stereo decoder Multipath input Multipath output I I O Multiplexer output left channel Multiplexer output right channel O O Stereo decoder quality output Soft mute drive I
2C
CDROUT CD output right channel CDGND CDLOUT CDL nc PH PH + AFS AM nc MPX nc LEVEL MPIN MPOUT nc MUXL MUXR nc QUAL SMUTE SCL SDA nc GND VS nc OUTRR OUTLR OUTRF OUTLF nc ACOUTR ACOUTL Pre-speaker AC output right channel Pre-speaker AC output left channel Right rear speaker output Left rear speaker output Right front spaeaker output Left front speaker output Supply ground Supply voltage CD input common ground CD output left channel CD input left channel
O I I I/O S S O O O O O O
clock line
I2C data line
8/46
TDA7407 Table 1.
N. 36 37 38 39 40 41 42 43 44
Block diagram and pin connections Pin Description (continued)
Name nc ACINLR ACINRR ACINRF ACINLF VREF CREF TAPEL TAPER Pre-speaker input left rear channel Pre-speaker input right rear channel Pre-speaker input right front channel Pre-speaker input left front channel Reference voltage output Reference capacitor pin Tape input left Tape input right Function Type I I I I O S I I
Pin type legend: I = Input ; O = Output; I/O = Input/Output; S = Supply; nc = not connected
Table 2.
Symbol VS Tamb Tstg
Absolute maximum ratings
Parameter Operating supply voltage Operating ambient temperature range Operating storage temperature range Value 10.5 -40 to 85 -55 to 150 Unit V C C
Table 3.
Symbol VS IS SVRR
Supply
Parameter Supply voltage Supply current Ripple rejection @ 1KHz Stereo decoder + audioprocessor 45 55 dB VS = 9V Audioprocessor (all filters flat) Test Condition Min. 7.5 30 50 Typ. 9 35 60 Max. 10 40 Unit V mA dB
Table 4.
Symbol
Thermal data
Parameter Value 85 Unit C/W
Rth-j pins Thermal resistance junction to pins (max)
1.1
ESD
All pins are protected against ESD according to the MIL883 standard.
9/46
Audio processor part
TDA7407
2
2.1
2.1.1
Audio processor part
List of features
Input multiplexer

Quasi differential CD and cassette stereo input AM mono input Phone differential input Multiplexer signal after In-Gain available at separate pins
2.1.2
Volume control

1dB attenuator Max. gain 15dB Max. attenuation 79dB
2.1.3
Bass control

2nd order frequency response Q-factor programmable in 4 steps Center frequency programmable in 4(5) steps DC gain programmable 15 x 1dB steps
2.1.4
Mid control

2nd order frequency response Q-factor programmable in 2 steps Center frequency programmable in 4 steps 15 x 1dB steps
2.1.5
Treble control

2nd order frequency response Center frequency programmable in 4 steps 15 x 1dB steps
2.1.6
Speaker control

4 independent speaker controls in 1dB steps max gain 15dB max. attenuation 79dB
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TDA7407
Audio processor part
2.1.7
Mute functions

Direct mute Digitally controlled softmute with 4 programmable mute time.
2.2
Electrical characteristics
Table 5.
.
Audio processor electrical characteristics (VS = 9V; Tamb = 25C; RL = 10K; all gains = 0dB; f = 1KHz; unless otherwise specified)
Parameter Test condition Min. Typ. Max. Unit
Symbol Input selector Rin VCL SIN
Input resistance Clipping level Input separation
all inputs except phone
70 2.2 80 -1 13 0.5
100 2.6 100 0 15 1 0.5 5
130
K VRMS dB
GIN MIN Min. input gain GIN MAX Max. input gain GSTEP VDC Step resolution Adjacent gain step DC steps GMIN to GMAX
1 17 1.5 5 10
dB dB dB mV mV
-5 -10
Differential CD stereo input Differential Rin Input resistance Common mode Common mode rejection ratio Output noise @ speaker outputs VCM = 1VRMS @ 1KHz VCM = 1VRMS @ 10KHz 20Hz to 20KHz flat; all stages 0dB 70 45 45 100 70 60 6 15 130 K dB dB mV 70 100 130 K
CMRR
eN
Differential phone input Rin CMRR Input resistance Common mode rejection ratio Differential VCM = 1VRMS @ 1KHz VCM = 1VRMS @ 10KHz 40 40 40 56 70 60 K dB dB
Volume control GMAX AMAX ASTEP EA ET Max gain Max attenuation Step resolution G = -20 to 20dB Attenuation set error G = -60 to 20dB Tracking error -4 0 3 2 dB dB 13 70 0.5 -1.25 15 79 1 0 1.5 1.25 17 dB dB dB dB
11/46
Audio processor part Table 5.
TDA7407 Audio processor electrical characteristics (continued) (VS = 9V; Tamb = 25C; RL = 10K; all gains = 0dB; f = 1KHz; unless otherwise specified)
Parameter Test condition Adjacent attenuation steps Min. Typ. 0.1 0.5 Max. 3 5 Unit mV mV
Symbol VDC
DC steps From 0dB to GMIN
Soft mute/AFS AMUTE Mute attenuation T1 T2 TD Delay time T3 T4 VTH low Low threshold for SM-/AFSPin(1) 2.5 45 40.4 324 1 ms ms V V K 80 100 0.48 0.96 dB ms ms
VTH high High threshold for SM-/AFS-Pin RPD Internal pull-up resistor
Bass control CRANGE Control range ASTEP Step resolution fC1 fC2 fC Center frequency fC3 fC4 Q1 QBASS Quality factor Q2 Q3 Q4 DC = off DCGAIN Bass-DC-gain MID control CRANGE Control range ASTEP Step resolution fC1 fC Center frequency fC2 fC3 fC4 13 0.5 450 0.9 1.35 1.8 15 1 500 1 1.5 2 17 1.5 550 1.1 1.65 2.2 dB dB Hz kHz kHz kHz DC = on 13 0.5 54 63 72 90 0.9 1.1 1.3 1.8 -1 3.5 15 1 60 70 80 100 (150)
(2)
17 1.5 66 77 88 110 1.1 1.4 1.7 2.2 1 5.5
dB dB Hz Hz Hz Hz
1 1.25 1.5 2 0 4.4
dB dB
12/46
TDA7407 Table 5.
Audio processor part Audio processor electrical characteristics (continued) (VS = 9V; Tamb = 25C; RL = 10K; all gains = 0dB; f = 1KHz; unless otherwise specified)
Parameter Quality factor Q1 Q2 Test condition Min. 0.9 1.8 Typ. 1 2 Max. 1.1 2.2 Unit
Symbol QMID
Treble control CRANGE Control range ASTEP Step resolution fC1 fC Center frequency fC2 fC3 fC4
1. The SM pin is active low (mute = 0) 2. See note in programming section
13 0.5 8 10 12 14
15 1 10 12.5 15 17.5
17 1.5 12 15 18 21
dB dB KHz KHz KHz KHz
13/46
Stereo decoder part
TDA7407
3
Stereo decoder part
Table 6. Stereo decoder electrical characteristics (VS = 9V; de-emphasis time constant = 50s,VMPX = 500mV (75KHz deviation), fm= 1KHz, Gv = 6dB. Tamb = 25C; unless otherwise specified)
Parameter MPX input level Input resistance Min. input gain Max. input gain Step resolution Supply voltage ripple rejection Max. channel separation Total harmonic distortion Signal plus noise to noise ratio A-weighted, S = 2VRMS 80 Vripple = 100mV; f = 1KHz Test condition Gv = 3.5dB 70 1.5 8.5 1.75 35 30 Min. Typ. Max. 0.5 100 3.5 11 2.5 60 50 0.02 91 0.3 1.25 130 4.5 12.5 3.25 Unit VRMS K dB dB dB dB dB % dB
Symbol Vin Rin GMIN GMAX GSTEP SVRR THD
S+N ------------N
Mono / stereo switch VPTHST1 VPTHST0 Pilot threshold voltage Pilot threshold voltage for Stereo, PTH = 1 for Stereo, PTH = 0 for Mono, PTH = 1 for Mono, PTH = 1 10 15 7 10 15 25 12 19 25 35 17 25 mV mV mV mV
VPTHMO1 Pilot threshold voltage VPTHMO0 Pilot threshold voltage PLL f/f Capture range
0.5
%
De-emphasis and highcut tHC50 tHC75 tHC50 tHC75 De-emphasis time constant De-emphasis time constant Highcut time constant Highcut time constant Bit 7, Subadr, 10 = 0, VLEVEL >> VHCH Bit 7, Subadr, 10 = 1, VLEVEL >> VHCH Bit 7, Subadr, 10 = 0, VLEVEL >> VHCL Bit 7, Subadr, 10 = 1, VLEVEL >> VHCL 25 50 100 150 50 75 150 225 75 100 200 300 s s s s
Stereo blend and highcut control REF5V TCREF5V LGmin LGmax Internal reference voltage Temperature coefficient Min. LEVEL gain Max. LEVEL gain -1 8 4.7 5 3300 0 10 1 12 5.3 V ppm dB dB
14/46
TDA7407 Table 6.
Stereo decoder part Stereo decoder electrical characteristics (continued) (VS = 9V; de-emphasis time constant = 50s,VMPX = 500mV (75KHz deviation), fm= 1KHz, Gv = 6dB. Tamb = 25C; unless otherwise specified)
Parameter LEVEL gain step resolution Test condition Min. 0.3 25 54 2.2 38 62 5 12 28 2.2 Typ. Max. 0.67 29 58 4.2 42 66 8.4 17 33 4.2 1 33 62 6.2 46 70 12 22 38 6.2 Unit dB %REF5V %REF5V %REF5V %REF5V %REF5V %REF5V %VHCH %VHCH %VHCH
Symbol LGstep
VSBLmin Min. voltage for mono VSBLmax Min. voltage for mono VSBLstep Step resolution VHCHmin Min. voltage for NO highcut VHCHmax Min. voltage for NO highcut VHCHstep Step resolution VHCLmin Min. voltage for full highcut VHCLmax Max. voltage for full highcut VHCLstep Step resolution Carrier and harmonic suppression at the output 19 38 57 76 Pilot signal f = 19KHz Subcarrier f = 38KHz Subcarrier f = 57KHz Subcarrier f = 76KHz
40
50 75 62 90
dB dB dB dB
Intermodulation (Note 1) 2 3 fmod = 10KHz, fspur = 1KHz fmod = 13KHz, fspur = 1KHz 65 75 dB dB
Traffic Ratio (Note 2) 57 Signal f = 57KHz 70 dB
SCA - Subsidiary communications authorization (note 3) 67 Signal f = 67KHz 75 dB
ACI - Adjacent channel interference (note 4) 114 190 Signal f = 114KHz Signal f = 190KHz 95 84 dB dB
15/46
Stereo decoder part
TDA7407
3.1
Notes to the characteristics:
1. Intermodulation suppression:
V O ( signal ) ( at1kHz ) 2 = ------------------------------------------------------- ; fs = (2 x 10kHz) - 19kHz V O ( spurious ) ( at1kHz ) V O ( signal ) ( at1kHz ) 3 = ------------------------------------------------------- ; fs = (3 x 13kHz) - 38kHz V O ( spurious ) ( at1kHz )
measured with: 91% pilot signal; fm = 10kHz or 13kHz. 2. Traffic radio (V.F.) suppression: measured with: 91% stereo signal; 9% pilot signal; fm = 1kHz; 5% subcarrier (f = 57kHz, fm = 23Hz AM, m = 60%)
V O ( signal ) ( at1kHz ) 57 ( V.W > F. ) = --------------------------------------------------------------------------V O ( spurious ) ( at1kHz 23kHz )
3.
SCA (Subsidiary Communications Authorization) measured with: 81% mono signal; 9% pilot signal; fm = 1kHz; 10% SCA - subcarrier (fs = 67kHz, unmodulated).
V O ( signal ) ( at1kHz ) 67 = ------------------------------------------------------- ; Fs =(2 x 38kHz) - 67kHz V O ( spurious ) ( at9kHz )
4.
ACI (Adjacent Channel Interference):
V O ( signal ) ( at1kHz ) 114 = ------------------------------------------------------- ; Fs = 110kHz - (3 x 38kHz) V O ( spurious ) ( at4kHz ) V O ( signal ) ( at1kHz ) 114 = ------------------------------------------------------- ; Fs = 186kHz - (5 x 38kHz) V O ( spurious ) ( at4kHz )
measured with: 90% mono signal; 9% pilot signal; fm =1kHz; 1% spurious signal (fs = 110kHz or 186kHz, unmodulated).
16/46
TDA7407
Noise blanker part
4
Noise blanker part

internal 2nd order 140kHz high pass filter programmable trigger threshold trigger threshold dependent on high frequency noise with programmable gain additional circuits for deviation and fieldstrength dependent trigger adjustment very low offset current during hold time due to opamps wMOS inputs four selectable pulse suppression times programmable noise rectifier charge/discharge current Noise blanker electrical characteristics
Parameter Test condition NBT = 111 NBT = 110 NBT = 101 VTR Trigger threshold (1) (2) meas. with VPEAK = 0.9V NBT = 100 NBT = 011 NBT = 010 NBT = 001 NBT = 000 NCT = 00 Min.
(10) (10) (10) (10) (10) (10) (10) (10) (10) (10) (10) (10)
Table 7.
Symbol
Typ. 30 35 40 45 50 55 60 65 260 220 180 140 0.9 1.7 2.5 0.9(off) 1.2 2.0 2.8 0.9(off) 1.4 1.9 2.4
Max.
(10) (10) (10) (10) (10) (10) (10) (10) (10) (10) (10) (10)
Unit mVOP mVOP mVOP mVOP mVOP mVOP mVOP mVOP mVOP mVOP mVOP mVOP V V V VOP VOP VOP VOP V V V V
VTRNOISE
Noise controlled trigger threshold (3)
meas. with VPEAK = 1.5V
NCT = 01 NCT = 10 NCT = 11
VMPX = 0mV VRECT Rectifier voltage
NRD
(7)
= 00
0.5 1.5 2.2 0.5 0.9 1.7 2.5 0.5 0.9 1.7 2.1
1.3 2.1 2.9 1.3 1.5 2.3 3.1 1.3 1.5 2.3 3.1
VMPX = 50mV; f = 150KHz VMPX = 200mV; f = 150KHz OVD = 11 means. with VMPX = 800mV (75KHz dev.)
VRECT DEV
Deviation dependent rectifier voltage (4)
OVD = 10 OVD = 01 OVD = 00 FSC = 11
Fieldstrength VRECT FS controlled rectifier voltage (5)
means. with VMPX = 0mV VLEVEL << VSBL (fully mono)
FSC = 10 FSC = 01 FSC = 00
17/46
Noise blanker part Table 7.
Symbol
TDA7407 Noise blanker electrical characteristics (continued)
Parameter Test condition BLT = 00 Min. TBD TBD TBD TBD
(10) (10) (10) (10) (10) (10) (10) (10) (10) (10)
Typ. 38 32 25.5 22 0.3 0.8 1.3 2.0 10 20 0.3 0.5 0.7 0.9
Max. TBD TBD TBD TBD
(10) (10) (10) (10) (10) (10) (10) (10) (10) (10)
Unit s s s s V/ms V/ms V/ms V/ms mV/s mV/s V/ms V/ms V/ms V/ms
TS
Suppression pulse duration (6)
Signal HOLDN in testmode
BLT = 10 BLT = 01 BLT = 00 NRD = 00
(5)
Noise rectifier Signal PEAK in VRECTADJ discharge adjustment testmode (7)
NRD = 01 (5) NRD = 10 NRD = 11
(5) (5)
SRPEAK
Noise rectifier charge
Signal PEAK in testmode
PCH = 0
(8)
PCH = 1 (8) MPNB = 00
(9) (9) (9)
VADJMP
Noise rectifier adjustment through multipath (9)
Signal PEAK in testmode
MPNB = 01 MPNB = 10
MPNB = 11 (9)
1. All Thresholds are measured using a pulse with TR =2ms, THIGH = 2ms and TF = 10ms. The repetition rate must not increase the PEAK voltage 2. NBT represents the Noiseblanker Byte bits D2, D0 for the noise blanker trigger threshold 3. NAT represents the Noiseblanker Byte bit pair D4, D3 for the noise controlled triggeradjustment 4. OVD represents the Noiseblanker Byte bit pair D7, D6 for the over deviation detector 5. FSC represents the Fieldstrength Byte bit pair D1, D0 for the fieldstrength control 6. BLT represents the Speaker RR Byte bit pair D7, D6 for the blanktime adjustment 7. NRD represents the Configuration Byte bit pair D1, D0 for the noise rectifier discharge adjustment 8. PCH represents the Stereo decoder Byte bit D5 for the noise rectifier charge current adjustment 9. MPNB represents the HighCut Byte bit D7 and the Fieldstrength Byte D7 for the noise rectifier multipath adjustment 10. By design / characterization functionally guaranteed through dedicated test mode structure
Figure 3.
Vn timing diagram
VIN VOP
DC
D97AU636
TR
THIGH
TF
Time
18/46
TDA7407 Figure 4. Trigger threshold vs.VPEAK
VTH
Noise blanker part
260mV(00) 220mV(01) 180mV(10) 140mV(11) MIN. TRIG. THRESHOLD NOISE CONTROLLED TRIG. THRESHOLD 65mV 8 STEPS 30mV VPEAK(V)
0.9V
D97AU648
1.5V
Figure 5.
Deviation controlled trigger adjustment
VPEAK (VOP) 00
2.8 2.0
01
10 1.2 0.9 DETECTOR OFF (11)
D97AU649
20
32.5
45
75
DEVIATION(KHz)
Figure 6.
Fieldstrength controlled trigger adjustment
VPEAK MONO STEREO
3V
2.4V(00) 1.9V(01) 1.4V(10) NOISE ATC_SB OFF (11)
0.9V
noisy signal
D97AU650
good signal
E'
19/46
Multipath detector
TDA7407
5
Multipath detector

Internal 19kHz band pass filter Programmable band pass and rectifier gain two pin solution fully independent usable for external programming selectable internal influence on Stereoblend Multipath electrical characteristics
Parameter Center frequency of multipath-bandpass Test condition stereo decoder locked on pilot tone bits D2, D1 configuration byte = 00 GBPMP Bandpass gain bits D2, D1 configuration byte = 10 bits D2, D1 configuration byte = 01 bits D2, D1 configuration byte = 11 bits D7, D6 configuration byte = 00 Min. Typ. Max. Unit 19 6 12 16 18 7.6 4.6 0 off 0.5 1.0 0.5 1 1.5 KHz dB dB dB dB dB dB dB dB A A mA
Table 8.
Symbol fCMP
GRECTMP Rectifier gain
bits D7, D6 configuration byte = 01 bits D7, D6 configuration byte = 10 bits D7, D6 configuration byte = 11
ICHMP IDISMP
Rectifier charge current Rectifier discharge current
bit D5 configuration byte = 0 bit D5 configuration byte = 1
Table 9.
Symbol
Quality detector
Parameter Test Condition 00 01 10 11 00 01 10 11 Min. Typ. Max. Unit 0.7 0.85 1.00 1.15 15 12 9 6 dB dB dB dB dB dB dB dB
A
Multipath Influence factor
Addr. 12 / Bit 5+6
B
Noise influence factor
Addr. 16 / Bit 1+2
20/46
TDA7407
Multipath detector
5.1
5.1.1
Description of the audioprocessor part
Input multiplexer

CD quasi differential Cassette stereo Phone differential AM mono Stereo decoder input.
5.1.2
Input stages
Most of the input stages have remained the same as in preceeding ST audioprocessors with the exception of the CD inputs (see Figure 7). In the meantime there are some CD players on the market having a significant high source impedance which strongly affects the common mode rejection of the normal differential input stage. The additional buffer of the CD input avoids this drawback and offers the full common mode rejection even with those CD players. The output of the CD stage is permanently available of the CD out-pins
5.1.3
AutoZero
In order to reduce the number of pins, there is no AC coupling between the In-Gain and the following stage, so that any offset generated by or before the In-Gain stage would be transferred or even amplified to the output. To avoid that effect a special offset cancellation stage called AutoZero is implemented. This stage is located before the volume block to eliminate all offsets generated by the stereo decoder, the input stage and the In-Gain (please notice that externally generated offsets, e.g. generated through the leakage current of the coupling capacitors, are not cancelled). Auto-zeroing is started every time the DATA-BYTE 0 is selected and takes a time of max. 0.3ms. To avoid audible clicks the audioprocessor is muted before the volume stage during this time.
5.1.4
AutoZero remain
In some cases, for example if the P is executing a refresh cycle of the I2C bus programming, it is not useful to start a new AutoZero action because no new source is selected and an undesired mute would appear at the outputs. For such applications the TDA7407 could be switched in the "Auto Zero Remain mode" (Bit 6 of the subaddress byte). If this bit is set to high, the DATABYTE 0 could be loaded without invoking the AutoZero and the old adjustment value remains.
5.1.5
Multiplexer output
The output signal of the input multiplexer is available at separate pins (please see the block diagram). This signal represents the input signal amplifier by the In-Gain stage and is also going into the mixer stage.
21/46
Multipath detector
TDA7407
5.1.6
Softmute
The digitally controlled softmute stage allows muting/demuting the signal with a I2C bus programmable slope. The mute process can either be activated by the softmute pin or by the I2C bus. The slope is realized in a special S shaped curve to mute slow in the critical regions. Figure 7. Input stages
15K CD+ 100K 1 + 15K CD100K 27K PHONE+ + 27K PHONECASSETTE 100K 28K IN GAIN 28K 1 15K 15K
CD OUT
AM 100K STEREO DECODER 100K
D98AU854A
MPX
Figure 8.
Softmute timing
EXT. MUTE
1
+SIGNAL
REF
-SIGNAL
1 I2C BUS OUT
D97AU634
Time
Note:
Please notice that a started Mute action is always terminated and could not be interrupted by a change of the mute signal. For timing purposes the Bit 3 of the I2C bus output register is set to 1 from the start of muting until the end of demuting.
5.1.7
BASS
There are four parameters programmable in the bass stage: (see figs 9, 10, 11, 12):
22/46
TDA7407
Multipath detector
5.1.8
Attenuation (80Hz)
Figure 9 shows the attenuation as a function of frequency at a center frequency of 80Hz.
5.1.9
Center frequency (60, 70, 80, 100Hz)
Figure 10 shows the four possible center frequencies 60,70,80 and 100Hz.
5.1.10
Quality factors (1, 1.25, 1.5, 2)
Figure 11 shows the four possible quality factors 1, 1.25, 1.5 and 2.
5.1.11
DC mode
In this mode the DC gain is increased by 5.1dB. In addition the programmed center frequency and quality factor is decreased by 25%, which can be used to reach alternative center frequencies or quality factors. (see Figure 12)
5.1.12
MID
There are 3 parameters programmable in the mid stage (see figures13, 14 and 15)
5.1.13
Attenuation (1kHz)
Figure 13 shows the attenuation as a function of frequency at a center frequency of 1kHz.
5.1.14
Center frequency (500, 1k, 1.5k, 2k Hz)
Figure 14 shows the four possible center frequencies 500Hz, 1kHz, 1.5kHz and 2kHz.
5.1.15
Quality factor (2 at 1kHz)
Figure 15 shows the two possible quality factors 1 and 2 at a center frequency of 1kHz.
5.1.16
Treble
There are two parameters programmable in the treble stage (see figures 16, and17):
5.1.17
Attenuation (17.5kHz)
Figure 16 shows the attenuation as a function of frequency at a center frequency of 17.5KHz.
5.1.18
Center frequency (10, 12.5, 15, 17.5kHz)
Figure 17 shows the four possible Center Frequency (10, 12.5, 15 and 17.5kHz).
5.1.19
AC coupling
In some applications additional signal manipulations are desired, for example surround sound or more band equalizing. For this purpose AC Coupling is placed before the speaker attenuators, which can be activated or internally shorted by Bit7 in the Bass/Treble configuration byte. In short condition the input signal of the speaker attenuator is available at
23/46
Multipath detector AC Outputs and the AC Input could be used as additional stereo inputs. The input impedance of the AC Inputs is always 50K.
TDA7407
5.1.20
Speaker Attenuator
The speaker attenuators have exactely the same structure and range like the volume stage.
Figure 9.
Bass control @ fc = 80Hz, Q = 1
Figure 10. Bass center @ Gain = 14dB, Q =1
15.0 10.0 5.0 0.0 -5.0 -10.0
15.0 12.5 10.0 7.5 5.0 2.5 0.0
-15.0 10.0 100.0 1.0K 10.0K
10.0
100.0
1.0K
10.0K
Figure 11. Bass quality factors @ Gain =14dB, Figure 12. Bass normal and DC mode @ Gain fc = 80Hz = 14dB, fc = 80Hz
15.0 12.5 10.0
7.5 15.0 12.5 10.0
7.5
5.0
5.0 2.5 0.0 10.0 100.0 1.0K 10.0K
2.5 0.0 10.0 100.0 1.0K 10.0K Note: In general the center frequency, Q and DC-mode can be set independently. The exception from this rule is the mode (5/xx1111xx) where the center frequency is set to 150Hz instead of 100Hz.
24/46
TDA7407
Multipath detector
Figure 13. Mid control @ fc=1kHz, Q=1
Figure 14. Mid center frequency @ Gain=14dB, Q1
15.0
15.0
10.0
12.5
5.0
10.0
0.0
7.5
-5.0
5.0
-10.0
2.5
-15.0 10.0 100.0 1.0K 10.0K
0.0 10.0 100.0 1.0K 10.0K
Figure 15. Mid Q factor @ fc=1kHz, Gain=14dB
15.0
Figure 16. Treble control @ fc = 17.5KHz
15.0 10.0 5.0 0.0 -5.0 -10.0 -15.0 10.0
12.5
10.0
7.5
5.0
2.5
0.0 10.0 100.0 1.0K 10.0K
100.0
1.0K
10.0 K
Figure 17. Treble center frequencies@ Gain = 14dB
25/46
Multipath detector
TDA7407
5.2
Functional description of the stereo decoder
The stereo decoder part of the TDA7407 (see Figure 18) contains all functions necessary to demodulate the MPX signal like pilot tone dependent MONO/STEREO switching as well as "stereoblend" and "highcut" functions.
5.2.1
Stereo decoder Mute
The TDA7407 has a fast and easy to control RDS mute function which is a combination of the audioprocessor's softmute and the high ohmic mute of the stereo decoder. If the stereo decoder is selected and a softmute command is sent (or activated through the SM pin), the stereo decoder will be set automatically to the high ohmic mute condition after the audio signal has been softmuted. Hence a checking of alternate frequencies could be performed. To release the system from the mute condition, the unmute command must be sent: the stereo decoder is unmuted immediately and the audioprocessor is softly unmuted. Figure 19 shows the output signal VO as well as the internal stereo decoder mute signal. This influence of Softmute on the stereo decoder mute can be switched off by setting bit 3 of the Softmute byte to "0". A stereo decoder mute command (bit 0, stereo decoder byte set to "1") will set the stereo decoder in any case independently to the high ohmic mute state.
Figure 18. Block diagram of the stereo decoder
26/46
TDA7407 Figure 19. Signals during stereo decoder's softmute
SOFTMUTE COMMAND t STD MUTE
Multipath detector
t
VO
D97AU638
t
Figure 20. Internal Stereoblend characteristics
0 -5 -10 -15 -20 CS [dB] -25 -30 -35 -40 -45 -50
0
1
2
3
4
5
LEVELINTERN [V]
If any other source than the stereo decoder is selected the decoder remains muted and the MPX pin is connected to Vref to avoid any discharge of the coupling capacitor through leakage currents.
5.2.2
Ingain + Infilter
The Ingain stage allows to adjust the MPX signal to a magnitude of about 1Vrms internally which is the recommended value. The 4th order input filter has a corner frequency of 80KHz and is used to attenuate spikes and nose and acts as an anti allasing filter for the following switch capacitor filters.
5.2.3
Demodulator
In the demodulator block the left and the right channel are separated from the MPX signal. In this stage also the 19 kHz pilot tone is cancelled. For reaching a high channel separation the TDA7407 offers an I2C bus programmable roll-off adjustment which is able to compensate the lowpass behaviour of the tuner section. If the tuner attenuation at 38kHz is in a range from 4.2% to 31.0% the TDA7407 needs no external network in front of the MPX pin. Within this range an adjustment to obtain at least 40dB channel separation is possible. The bits for this adjustment are located together with the fieldstrength adjustment in one byte. This gives the possibility to perform an optimization step during the production of the car radio where the channel separation and the fieldstrength control are trimmed.
27/46
Multipath detector
TDA7407
5.2.4
De-emphasis and Highcut.
The lowpass filter for the de-emphasis allows to choose between a time constant of 50s and 75s (bit D7, stereo decoder byte). The highcut control range will be in both cases HC = 2 * Deemp. Inside the highcut control range (between VHCH and VHCL) the LEVEL signal is converted into a 5 bit word which controls the lowpass time constant between Deemp...3 * Deemp. There by the resolution will remain always 5 bits independently of the absolute voltage range between the VHCH and VHCL values. The highcut function can be switched off by I2C bus (bit D7, fieldstrength byte set to "0").
5.2.5
PLL and pilot tone detector
The PLL has the task to lock on the 19kHz pilotone during a stereo transmission to allow a correct demodulation. The included detector enables the demodulation if the pilot tone reaches the selected pilot tone threshold VPTHST. Two different thresholds are available. The detector output (signal STEREO, see block diagram) can be checked by reading the status byte of the TDA7407 via I2C bus.
5.2.6
Field strength control
The fieldstrength input is used to control the high cut and the stereoblend function. In addition the signal can be also used to control the noiseblanker thresholds and as input for the multipath detector. Figure 21. Relation between internal and external LEVEL voltage and setup of stereoblend
INTERNAL VOLTAGES REF 5V SETUP OF VST LEVEL INTERN REF 5V INTERNAL VOLTAGES SETUP OF VMO LEVEL INTERN
LEVEL VSBL VSBL
58% 50% 42% 33%
VMO
VST
t FIELDSTRENGHT VOLTAGE
D97AU639
VMO
VST
t FIELDSTRENGHT VOLTAGE
Figure 22. High cut characteristics
LOWPASS TIME CONSTANT
3*Deemp
Deemp
VHCL
D97AU640
VHCH
FIELDSTRENGHT
28/46
TDA7407
Multipath detector
5.2.7
LEVEL Input and Gain
To suppress undesired high frequency modulation on the highcut and stereoblend function the LEVEL signal is lowpass filtered firstly. The filter is a combination of a 1st order RC lowpass at 53kHz (working as anti-aliasing filter) and a 1st-order switched capacitor lowpass at 2.2kHz. The second stage is a programmable gain stage to adapt the LEVEL signal internally to different IF device (see Testmode section 5 LEVELINTERN). The gain is widely programmable in 16 steps from 0dB to 10dB (step = 0.67dB). These 4 bits are located together with the roll off bits in the "Stereo decoder adjustment" byte to simplify a possible adaptation during the production of the car radio.
5.2.8
Stereoblend control
The stereoblend control block converts the internal LEVEL voltage (LEVEL INTERN) into an demodulator compatible analog signal which is used to control the channel separation between 0dB and the maximum separation. Internally this control range has a fixed upper limit which is the internal reference voltage REF5V. The lower limit can be programmed between 29.2% and 58%, of REF5V in 4.167% steps (see Figure 21). To adjust the external LEVEL voltage to the internal range two values must be defined: the LEVEL gain LG and VSBL (see Figure 21). To adjust the voltage where the full channel separation is reached (VST) the LEVEL gain LG has to be defined. The following equation can be used to estimate the gain:
REF5V L G = -------------------------------------------------------------------------------------Field strenght voltage [STEREO]
The gain can be programmed through 4 bits in the "Stereo Decoder Adjustment" byte. The MONO voltage VMO (0dB channel separation) can be choosen selecting VSBLAll necessary internal reference voltages like REF5V are derived from a bandgap circuit. Therefore they have a temperature coefficient near zero. This is useful if the fieldstrength signal is also temperature compensated. But most IF devices apply a LEVEL voltage with a TC of 3300ppm. The TDA7407 offers this TC for the reference voltages, too. The TC is selectable with bit D7 of the "stereo decoder adjustment" byte.
5.2.9
Highcut control
The highcut control setup is similar to the stereoblend control setup: the starting point VHCH can be set with 2 bits to be 42, 50, 58 or 66% of REF5V whereas the range can be set to be 17, 22, 28 or 33% of VHCH (Figure 22).
5.2.10
Functional description of the noiseblanker
In the automotive environment the MPX signal is disturbed by spikes produced by the ignition, for example; the wiper motor. The aim of the noiseblanker part is to cancel the audible influence of the spikes. Therefore the output of the stereo decoder is held at the actual voltage for a time between 22 and 38s (programmable).
29/46
Multipath detector The block diagram of the noiseblanker is given in Figure 23.
TDA7407
In the first stage the spikes must be detected but to avoid wrong triggering on high frequency (white) noise, a complex trigger control is implemented. Behind the trigger stage a pulse former generates the "blanking" pulse. To avoid any crosstalk to the signal path the noiseblanker is supplied by his own biasing circuit.
5.2.11
Trigger path
The incoming MPX signal is highpass filtered, amplified and rectified. This second order highpass filter has a corner frequency of 140kHz. The rectified signal, RECT, is lowpass filtered to generate a signal called PEAK. Also noise with a frequency 140kHz increases the PEAK voltage. The resulting voltage can be adjusted by use of the noise rectifier discharge current. The PEAK voltage is fed to a threshold generator, which adds to the PEAK voltage a DC dependent threshold VTH. Both signals, RECT and PEAK+VTH are fed to a comparator which triggers a re-triggerable monoflop. The monoflop's output activates the sample and hold circuits in the signal path for selected duration. Figure 23. Block Diagram of the Noiseblanker
RECTIFIER RECT
MPX
+ VTH
MONOFLOP
HOLDN
+
PEAK LOWPASS MPX CONTROL +
THRESHOLD GENERATOR
ADDITIONAL THRESHOLD CONTROL
D98AU856
5.2.12
Automatic noise controlled threshold adjustment (ATC)
There are mainly two independent possibilities for programming the trigger threshold: a) b) the low threshold in 8 steps (bits D0 to D2 of the noiseblanker byte) the noise adjusted threshold in 4 steps (bits D3 and D4 of the noiseblanker byte, see Figure 23).
The low threshold is active in combination with a good MPX signal without any noise; the PEAK voltage is less than 1V. The sensitivity in this operation is high. If the MPX signal is noisy the PEAK voltage increases due to the higher noise, which is also rectified. With increasing of the PEAK voltage the trigger threshold increases, too. This particular gain is programmable in 4 steps.
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TDA7407
Multipath detector
5.3
5.3.1
Automatic threshold control mechanism
Automatic threshold control by the stereoblend voltage
Besides the noise controlled threshold adjustment there is an additional possibility for influencing the trigger threshold. It is depending on the stereoblend control. The point where the MPX signal starts to become noisy is fixed by the RF part. Therefore also the starting point of the normal noise-controlled trigger adjustment is fixed. In some cases the behaviour of the noiseblanker can be improved by increasing the threshold even in a region of higher fieldstrength. Sometimes a wrong triggering occures for the MPX signal often shows distortion in this range which can be avoided even if using a low threshold. Because of the overlap of this range and the range of the stereo/mono transition it can be controlled by stereoblend. This threshold increase is programmable in 3 steps or switched off with bits D0 and D1 of the fieldstrength control byte.
5.3.2
Over deviation detector
If the system is tuned to stations with a high deviation the noiseblanker can trigger on the higher frequencies of the modulation. To avoid this wrong behaviour, which causes noise in the output signal, the noiseblanker offers a deviation dependent threshold adjustment. By rectifying the MPX signal a further signal representing the actual deviation is obtained. It is used to increase the PEAK voltage. Offset and gain of this circuit are programmable in 3 steps with the bits D6 and D7 of the stereo decoder byte (the first step turns off the detector, see fig. 18).
5.4
Functional description of the multipath detector
Using the internal multipath detector the audible effects of a multipath condition can be minimized. A multipath condition is detected by rectifying the 19kHz spectrum in the fieldstrength signal.An external capacitor is used to define the attack and decay times (see block diagram Figure 24). the MPOUT pin is used as detector output connected to a capacitor of about 47nF and additionally the MPIN pin is selected to be the fieldstrength input. Using the configuration, an external user requirement adaptation is given in Figure 24. To keep the old value of the Multipath Detector during an AF-jump, the external capacitor can be disconnected by the MP Hold switch. This switch can be controlled directly by the AFS Pin. Selecting the "internal influence" in the configuration byte, the channel separation is automatically reduced during a multipath condition according to the voltage appearing at the MP_OUT pin. A possible application is shown in Figure 24.
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Multipath detector Figure 24. Block diagram of the multipath detector
TDA7407
5.4.1
Programming
To obtain a good multipath performance an adaptation is necessary. Therefore the gain of the 19kHz bandpass is programmable in four steps as well as the rectifier gain. The attack and decay times can be set by the external capacitor value.
5.4.2
Quality detector
The TDA7407 offers a quality detector output which gives a voltage representing the FM reception conditions. To calculate this voltage the MPX noise and the multipath detector output are summed according to the following formula: Quality = 1.6 (Vnoise -0.8V)+ a (REF5V - VMPOUT) The noise signal is the PEAK signal without additional influences. The factor "a" can be programmed from 0.7 to 1.15. the output is a low impedance output able to drive external circuitry as well as simply fed to an A/D converter for RDS applications.
5.4.3
AF Search Control
The TDA7407 is supplied with several functionality to support AF checks using the stereo decoder. As mentioned already before the high ohmic mute feature avoids any clicks during the jump condition. It is possible at the same time, to evaluate the noise and multipath content of the alternate frequency, by using the quality detector output. Therefore the multipath detector is switched automatically to a small time constant. No additional pin (AFS) is implemented in order to separate the audioprocessor mute and stereo decoder AF functions. In Figure 25 the block diagram and control functions of the complete AFS functionality is shown (please note that the pins AFS and SM are active low as well as all control bits indicated by an overbar).
5.5
Test mode
During the test mode, which can be activated by setting bit D0 of the testing byte and bit D5 of the subaddress byte to "1", several internal signals are available at the CASSR pin. During this mode the input resistor of 100kOhm is disconnected from the pin. The internal signals available are shown in the software specification.
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TDA7407 Figure 25. Mute control logic
Multipath detector
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I2C Bus interface description
TDA7407
6
6.1
I2C Bus interface description
Interface protocol
The interface protocol comprises: - - - - - a start condition (S) a chip address byte (the LSB bit determines read / write transmission) a subaddress byte a sequence of data (N-bytes + acknowledge) a stop condition (P
Table 10.
Addresses
Chip address Subaddress Data 1 to data n
MSB S 1
LSB 0 0 0 1 1 0 R/W ACK
D97AU627 S = Start ACK = Acknowledge AZ = AutoZero Remain T = Testing I = Auto increment P = Stop
MSB X AZ T
LSB I A3 A2 A1 A0 ACK
MSB DATA
LSB ACK P
Max clock speed 500kbits/s The transmitted data is automatically updated after each ACK. Transmission can be repeated without new chip address.
6.2
Auto increment
If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled. Table 11.
MSB X X X X ST SM X
Transmitted data (send mode)
LSB X
SM = Soft mute activated ST = Stereo X = Not Used
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TDA7407 Table 12.
MSB I3 I2 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 I1 I0 A3 A2 A1
I2C Bus interface description Subaddress (receive mode)
LSB A0 AutoZero Remain off on Testmode off on Auto Increment Mode off on Input Multiplexer Volume Treble Bass Speaker attenuator LF Speaker attenuator RF Speaker attenuator LR Speaker attenuator RR Soft Mute / Bass Prog. Stereo Decoder Noiseblanker High Cut Control Fieldstrength & Quality Configuration EEPROM Testing New Quality/Control Middle Filter Function
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Data byte specification
TDA7407
7
Data byte specification
After power on reset all register are set to 11111110 Table 13.
MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 0 0 : 1 1 0 1 0 0 : 1 1 0 0 : 1 1 0 1 : 0 1 D1 0 0 1 1 0 0 1 1
Input selector (subaddress 0H)
LSB D0 0 1 0 1 0 1 0 1 Source selector CD Cassette Phone AM Stereo Decoder AC Inputs Front Mute AC inputs Rear In-Gain 15dB 14dB : 1 dB 0 dB Coupl. front speaker external internal Function
Table 14.
MSB
D7 D6
Volume and speaker attenuation (subaddress 1H, 4H, 5H, 6H, 7H)
LSB
D5 D4 D3 D2 D1 D0
Function
1 : 1 1 1 : 1 0 0 0 : 0 0 : 0 0 X
0 : 0 0 0 : 0 0 0 0 : 0 0 : 1 1 1
0 : 0 0 0 : 0 0 0 0 : 0 0 : 0 0 1
1 : 1 1 0 : 0 0 0 0 : 0 1 : 0 0 X
1 : 0 0 1 : 0 0 0 0 : 1 0 : 1 1 X
1 : 0 0 1 : 0 0 0 0 : 1 0 : 1 1 X
1 : 0 0 1 : 0 0 0 0 : 1 0 : 1 1 X
1 : 1 0 1 : 1 0 0 1 : 1 0 : 0 1 X
not used configurations
+15dB : +1dB 0dB 0dB -1dB : -15dB -16dB : -78dB -79dB Mute
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TDA7407 Table 15.
MSB D7 D6 D5 D4 0 0 : 0 0 1 1 : 1 1 0 0 1 1 0 1 0 1 0 1 D3 0 0 : 1 1 1 1 : 0 0 D2 0 0 : 1 1 1 1 : 0 0 D1 0 0 : 1 1 1 1 : 0 0
Data byte specification Treble filter (subaddress 2H)
LSB D0 0 1 : 0 1 1 0 : 1 0 Treble steps -15dB -14dB : -1dB 0dB 0dB +1dB : +14dB +15dB Treble center frequency 10.0KHz 12.5KHz 15.0KHz 17.5KHz Coupl. rear speaker external (AC) internal Function
Table 16.
MSB D7 D6
Bass filter (subaddress 3H)
LSB D5 D4 0 0 : 0 0 1 1 : 1 1 D3 0 0 : 1 1 1 1 : 0 0 D2 0 0 : 1 1 1 1 : 0 0 D1 0 0 : 1 1 1 1 : 0 0 D0 0 1 : 0 1 1 0 : 1 0 Bass Steps -15dB -14dB : -1dB 0dB 0dB +1dB : +14dB +15dB Bass Q factor 1.0 1.25 1.50 2.0 Bass DC mode off on Function
0 0 1 1 0 1
0 1 0 1
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Data byte specification Table 17.
MSB D7 D6 D5 D4 D3 D2 D1
TDA7407 Soft mute and bass programming (subaddress 8H)
LSB D0 Mute Enable Soft Mute Disable Soft Mute Mutetime = 0.48ms Mutetime = 0.96ms Mutetime = 40.4ms Mutetime = 324ms Stereo decoder Soft Mute Influence = on Stereo decoder Soft Mute Influence = off Bass center frequency Center Frequency = 60 Hz Center Frequency = 70 Hz Center Frequency = 80 Hz Center Frequency = 100Hz Center Frequency = 150Hz Noise blanker time 38ms 25.5ms 32ms 22ms Function
0 1 0 0 1 1 1 0 0 1 1 0 1 0 1 0 1 0 1 1
0 0 1 1
0 1 0 1
0 1
1 Only for Bass Q-Factor = 2.0
Table 18.
MSB D7 D6
Stereo decoder (subaddress 9H)
LSB D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 STD Unmuted STD Muted In Gain 11dB In Gain 8.5dB In Gain 6dB In Gain 3.5dB Stereo decoder = on Stereo decoder = off Forced Mono Mono/Stereo switch automatically Noiseblanker PEAK charge current low Noiseblanker PEAK charge current high Pilot Threshold HIGH Pilot Threshold LOW De-emphasis 50s De-emphasis 75s Function
0 1 0 1
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TDA7407 Table 19.
MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 0 0 1 1 0 1 0 0 1 1 0 1 0 1 0 1 0 1 D1 0 0 1 1 0 0 1 1
Data byte specification Noiseblanker (subaddress AH)
LSB D0 0 1 0 1 0 1 0 1 Low Threshold 65mV Low Threshold 60mV Low Threshold 55mV Low Threshold 50mV Low Threshold 45mV Low Threshold 40mV Low Threshold 35mV Low Threshold 30mV Noise Controlled Threshold 320mV Noise Controlled Threshold 260mV Noise Controlled Threshold 200mV Noise Controlled Threshold 140mV Noise blanker OFF Noise blanker ON Over deviation Adjust 2.8V Over deviation Adjust 2.0V Over deviation Adjust 1.2V Over deviation Detector OFF Function
Table 20.
MSB D7 D6
High Cut (subaddress BH)
LSB D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 High Cut OFF High Cut ON Max. High Cut 2dB Max. High Cut 5dB Max. High Cut 7dB Max. High Cut 10dB VHCH at 42% REF 5V VHCH at 50% REF 5V VHCH at 58% REF 5V VHCH at 66% REF 5V VHCL at 16.7% VHCH VHCL at 22.2% VHCH VHCL at 27.8% VHCH VHCL at 33.3% VHCH Strong Multipath influence on PEAK 18K OFF ON (18K Discharge if VMPOUT <2.5V) Function
0 0 1 1 0 1
0 1 0 1
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Data byte specification Table 21.
MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 D1 0 0 1 1 0 0 1 1
TDA7407 Field strength Control (subaddress CH)
LSB D0 0 1 0 1 0 1 0 1 VSBL at 29% REF 5V VSBL at 33% REF 5V VSBL at 38% REF 5V VSBL at 42% REF 5V VSBL at 46% REF 5V VSBL at 50% REF 5V VSBL at 54% REF 5V VSBL at 58% REF 5V Noiseblanker Field strength Adj 2.3V Noiseblanker Field strength Adj 1.8V Noiseblanker Field strength Adj 1.3V Noiseblanker Field strength Adj OFF Quality Detector Coefficient a = 0.7 Quality Detector Coefficient a = 0.85 Quality Detector Coefficient a = 1.0 Quality Detector Coefficient a = 1.15 Multipath off influence on PEAK discharge -1V/ms (at MPout = 2.5V Function
Table 22.
MSB D7 D6
Configuration (subaddress DH)
LSB D5 D4 D3 D2 D1 0 0 1 1 0 1 0 1 0 1 0 1 0 0 1 1 D0 0 1 0 1 Noise Rectifier Discharge Resistor R = infinite R = 56k R = 33k R =18k Multipath Detector Bandpass Gain 6dB 12dB 16dB 18dB Multipath Detector internal influence ON OFF Multipath Detector Charge Current 0.5A Multipath Detector Charge Current 1A Multipath Detector Reflection Gain Gain = 7.6dB Gain = 4.6dB Gain = 0dB disabled Function
0 0 1 1
0 1 0 1
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TDA7407 Table 23.
MSB D7 0 0 0 : 0 : 0 1 1 1 : 1 : 1 0 0 0 : 1 0 0 0 : 1 0 0 1 : 1 0 1 0 : 1 D6 D5 D4 D3 D2 0 0 0 : 1 : 1 0 0 0 : 1 : 1 D1 0 0 1 : 0 : 1 0 0 1 : 0 : 1
Data byte specification Stereo decoder adjustment (subaddress EH)
LSB D0 0 1 0 : 0 : 1 0 1 0 : 0 : 1 Roll Off Compensation not allowed 7.2% 9.4% : 13.7% : 20.2% not allowed 19.6% 21.5% : 25.3% : 31.0% Level Gain 0dB 0.66dB 1.33dB : 10dB Function
Table 24.
MSB D7 D6
Testing (subaddress FH)
LSB D5 D4 D3 D2 D1 D0 Stereo decoder test signals OFF Test signals enabled if bit D5 of the subaddress (test mode bit) is set to "1", too External Clock Internal Clock Function
0 1 0 1
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Data byte specification Table 24.
MSB
TDA7407 Testing (subaddress FH) (continued)
LSB Function Testsignals at CASS_R VHCCH Level intern Pilot magnitude VCOCON; VCO Control Voltage Pilot threshold HOLDN NB threshold F228 VHCCL VSBL not used not used PEAK not used REF5V not used VCO OFF ON Audioprocessor test mode enabled if bit D5 of the subaddress(test mode bit) is set to "1" OFF
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1 0 1
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Note:
This byte is used for testing or evaluation purposes only and must not be set to other values than the default "11111110" in the application! Table 25.
MSB D7 D6 D5 D4 D3 D2 D1
New quality / control (subaddress 10H)
LSB D0 0 1 0 0 1 1 0 1 0 1 0 1 Reference generation Internal Reference-Divider External Reference Force Quality Noise Gain 15dB 12dB 9dB 6dB SC Clock Mode Fast Mode Normal Mode Function
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TDA7407 Table 25.
MSB
Data byte specification New quality / control (subaddress 10H) (continued)
LSB Auto Zero Off On Smoothing Filter On Off Enable AF Pin Enable Pin Disable Pin AF Pin ST Decoder Mute Influence On Off Function
0 1 0 1
0 1
0 1
Table 26.
MSB D7 D6
Mid filter (subaddress 11H)
LSB D5 D4 0 0 : 0 0 1 1 : 1 1 D3 0 0 : 1 1 1 1 : 0 0 D2 0 1 : 1 1 1 1 : 0 0 D1 0 1 : 1 1 1 1 : 0 0 D0 0 1 : 0 1 1 0 : 1 0 Attenuation -15dB -14dB : -1dB 0dB 0dB +1dB : +14dB +15dB Middle Center frequency 500Hz 1.0kHz 1.5kHz 2.0kHz Mid Q Factor 1.02.0 Function
0 0 1 1 01
0 1 0 1
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Package information
TDA7407
8
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
mm DIM. MIN. A A1 A2 B C D D1 D3 E E1 E3 e L L1 k ccc 0.45 11.80 9.80 0.05 1.35 0.30 0.09 11.80 9.80 12.00 10.00 8.00 12.00 10.00 8.00 0.80 0.60 1.00 0.75 0.018 12.20 10.20 0.464 0.386 1.40 0.37 TYP. MAX. 1.60 0.15 1.45 0.45 0.20 12.20 10.20 0.002 0.053 0.012 0.004 0.464 0.386 MIN.
inch TYP. MAX. 0.063 0.006 0.055 0.015 0.057 0.018 0.008 0.472 0.394 0.315 0.472 0.394 0.315 0.031 0.024 0.039 0.030 0.480 0.401 0.480 0.401
OUTLINE AND MECHANICAL DATA
0(min.), 3.5(typ.), 7(max.) 0.10 0.0039
LQFP44 (10 x 10 x 1.4mm)
0076922 E
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TDA7407
Revision history
9
Revision history
Table 27.
Date 04-Oct-2004 01-Apr-2005 22-Jan-06
Document revision history
Revision 1 2 3 Initial release. Style sheet changed to comply with corporate guidelines. Package change, layout changes, text modifications. Changes
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TDA7407
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